Core Research Areas:
- Embedded Systems and System-on-Chip (SoC) design, development support /debug and technology to increase security, power, performance and reliability
- Advanced embedded processor architectures targeted for automotive/industrial, robotics, image processing, sensor network nodes and other real-time critical applications
- Low-Power Architectures
- Application of AI for real world problems, robot control and embedded systems
Current Funded Research Projects:
- TFCloud – TFCloud, assuring the provenance of Cloud based Web Services, TSB
- COALAS – Cognitive Assisted Living Ambient Systems projected funded by European Regional Development Fund, ERDF Interreg IVA Channel Programme
- SYSIASS – Autonomous and Intelligent Healthcare System funded by European Regional Development Fund, Interreg IVA 2 Mers Seas Zeeën Programme
Recent Funded Research Projects
- RoBoSAS: Gobal engagement with NASA JPL and ESA in Robotics, Brain Computer Interfaces, and Secure Adaptive Systems for Space Applications” funded by EPSRC
- ADS-SoC – Adaptive Development Support for Future Systems-on-Chip funded by EPSRC (EP/I500952/1).
- ReSIP – Reconfigurable System-on-Chip based Networks of Integrated and Distributed Sensor Platform Nodes for Environmental Diagnostic and Sensing funded by EPSRC (EP/C005686/1).
- Networking of Distributed Sensors for Proactive Condition Monitoring of Wind Turbines funded by EPSRC (EP/C014790/1).
- ESPACENET: Evolvable Networks of Intelligent and Secure Integrated and Distributed Reconfigurable System-On-Chip Sensor Nodes for Aerospace Based Monitoring and Diagnostics funded by EPSRC (EP/C54630X/1).
- ACOS – Automated Control and guidance System funded by European Regional Development Fund, Interreg IIIA Programme.
- OMNIVISS – Embedded Omnidirectional Vision System for Environment Reconstruction and Analysis funded by European Regional Development Fund, Interreg IIIA Programme.
- ModEasy – MOdel Driven dEsign for Automative Safety embedded sYstem funded by European Regional Development Fund, Interreg IIIA Programme.
- Debug Support Strategy for Systems-on-Chips with Multiple Processor Cores funded by EPSRC (GR/S13361/01).